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Thermal characterization

Simcenter Micred T3Ster

The World's Most Precise Thermal Transient Measurement System

Characterize packaged semiconductors, reveal the thermal path from junction to ambient, and improve the fidelity of thermal simulation models.

Semiconductor package under thermal transient test with instrumented cold plate and measurement leads.

What It Is

T3Ster is a thermal transient testing system for precise, repeatable, non-destructive characterization of packaged semiconductor devices.

Core Capabilities

Core capabilities

  • 1 µs time resolution and 0.01 °C sensitivity
  • differential and cumulative structure functions
  • automatic Rth_jc, Rth_jb and Rth_ja extraction
  • multi-channel measurement up to hundreds of channels
  • DELPHI and 2-resistor Compact Thermal Model generation
  • direct export to Flotherm
  • structure-function die-attach void and delamination inspection
  • TIM characterization
  • transient Zth curve generation for datasheets
  • supports diodes, MOSFETs, IGBTs, LEDs, laser diodes and multi-die packages
  • T3Ster Master post-processing and reporting software

Best For

  • Semiconductor packages
  • LEDs
  • IGBTs and power modules
  • Power electronics
  • Thermal-interface evaluation
  • Package and cooling-path characterization
  • Simulation calibration
  • Reliability analysis

Six-stage workflow position

Chiplet/DieSubstrate/PackagePCBSystem

Measurement and correlation layer across the full component-to-system path.

Differentiators

Why engineering teams choose T3Ster.

Representative engineering situations these tools are asked to resolve.

  1. 01

    A 1200 V SiC module correlates to within 5% in simulation but measures 22% higher Rth_jc on hardware, and no one can say which layer is wrong. The T3Ster cumulative structure function resolves the stack layer by layer and puts the entire discrepancy in a 40 µm bond line that the model assumed was 25 µm — one material card change, not a redesign.

  2. 02

    A high-power LED array loses 12% luminous flux over 4,000 hours and the supplier and the assembler each blame the other. Measuring the same parts before and after ageing separates a 0.6 K/W rise inside the package from a 1.4 K/W rise at the board interface, locating the loss in TIM pump-out rather than phosphor degradation.

  3. 03

    An OEM will not accept a hand-built thermal model for a new power package and requires a JESD15-4 compact model with measured backing. T3Ster produces the JESD51-14 transient dual-interface Rth_jc and the structure-function basis, and the DELPHI network exports straight into Flotherm for the customer's system model.

Standards & Evidence
  • JEDEC JESD51-1 (electrical test method)
  • JESD51-2 (natural convection)
  • JESD51-6 (forced convection)
  • JESD51-8 (junction-to-board)
  • JESD51-14 (transient dual interface for Rth_jc)
  • MIL-STD-750
Who uses it
  • Package engineer
  • Reliability engineer
  • Thermal engineer
  • Failure analysis engineer

Simcenter Micred T3Ster gives us structure-function data we can trust for layer-by-layer thermal characterization, which has become a standard part of our qualification process.

Reliability engineering lead, power electronics manufacturer
Source: Siemens

Customer statement published by Siemens. Not an Electro Source engagement.

Delivered by Electro Source

How this reaches your team.

Delivered by Electro Source with lab commissioning, JEDEC-compliant fixture setup, operator training, and structure-function interpretation support. If you need the measurement without building the lab, ROIfast™ contract structure-function testing is available in our North American laboratory.

Discuss Your T3Ster Testing Requirements

Tell us what devices you need to characterize, what you plan to correlate with simulation, and what decisions you need the measurements to support.

Response time · typically within 1 business day
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